製品概要
概要
The ST7LITE1xB is a member of the ST7 microcontroller family. All ST7 devices are based on a common industry-standard 8-bit core, featuring an enhanced instruction set.
The ST7LITE1xB features FLASH memory with byte-by-byte In-Circuit Programming (ICP) and In-Application Programming (IAP) capability.
Under software control, the ST7LITE1xB device can be placed in WAIT, SLOW, or HALT mode, reducing power consumption when the application is in idle or standby state.
The enhanced instruction set and addressing modes of the ST7 offer both power and flexibility to software developers, enabling the design of highly efficient and compact application code. In addition to standard 8-bit data management, all ST7 microcontrollers feature true bit manipulation, 8x8 unsigned multiplication and indirect addressing modes.
For easy reference, all parametric data are located in section 13 on page 110. The ST7LITE1xB features an on-chip Debug Module (DM) to support In-Circuit Debugging (ICD). For a description of the DM registers, refer to the ST7 ICC Protocol Reference Manual.
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特徴
- Development Tools
Full hardware/software development package DM (Debug Module) - Instruction Set
8-bit data manipulation 63 basic instructions with illegal opcode detection 17 main addressing modes 8 x 8 unsigned multiply instructions - Analog Comparator
- Interrupt Management
12 interrupt vectors plus TRAP and RESET 15 external interrupt lines (on 4 vectors) - Memories
up to 4 Kbytes single voltage extended Flash (XFlash) Program memory with read-out protection, In-Circuit Programming and In-Application programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention: 20 years at 55˚C. 256 bytes RAM 128 bytes data EEPROM with read-out protection. 300K write/erase cycles guaranteed, data retention: 20 years at 55˚C. - I/O Ports
Up to 17 multifunctional bidirectional I/O lines 7 high sink outputs - Clock, Reset and Supply Management
Enhanced reset system Enhanced low voltage supervisor (LVD) for main supply and an auxiliary voltage detector (AVD) with interrupt capability for implementing safe power-down procedures Clock sources: Internal 1% RC oscillator (on ST7FLITE15B and ST7FLITE19B), crystal/ceramic resonator or external clock Internal 32-MHz input clock for Auto-reload timer Optional x4 or x8 PLL for 4 or 8 MHz internal clock Five Power Saving Modes: Halt, Active-Halt, Auto Wake-up from Halt, Wait and Slow - Communication Interface
SPI synchronous serial interface - A/D Converter
7 input channels Fixed gain Op-amp 13-bit precision for 0 to 430 mV (@ 5V VDD) 10-bit precision for 430 mV to 5V (@ 5V VDD) - 5 Timers
Configurable watchdog timer Two 8-bit Lite Timers with prescaler, 1 realtime base and 1 input capture Two 12-bit Auto-reload Timers with 4 PWM outputs, 1 input capture, 4 output compare and one pulse functions
- Development Tools
回路ダイアグラム
EDAシンボル / フットプリント / 3Dモデル
STマイクロエレクトロニクス - ST7LIT10BF1
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すべてのリソース
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Board Manufacturing Specifications (1)
| タイトル | バージョン | 更新日 | |||
|---|---|---|---|---|---|
| ZIP | 1.0 | 01 Aug 2015 | 01 Aug 2015 |