製品概要
概要
The STM32WLE5/E4xx long-range wireless and ultra-low-power devices embed a powerful and ultra-low-power radio compliant LPWAN radio solution: LoRa® (only available in STM32WLE5xx), (G)FSK, (G)MSK, and BPSK.
These devices are designed to be extremely low-power and are based on the high-performance Arm® Cortex®-M4 32-bit RISC core operating at a frequency of up to 48 MHz. This core implements a full set of DSP instructions and an independent memory protection unit (MPU) that enhances the application security.
The devices embed high-speed memories (Flash memory up to 256 Kbytes, SRAM up to 64 Kbytes), and an extensive range of enhanced I/Os and peripherals.
The devices also embed several protection mechanisms for embedded Flash memory and SRAM: readout protection, write protection and proprietary code readout protection.
These devices offer a 12-bit ADC, a 12-bit DAC low-power sample-and-hold, two ultra-low-power comparators associated with a high-accuracy reference voltage generator.
The devices embed a low-power RTC with a 32-bit sub-second wakeup counter, one 16-bit single-channel timer, two 16-bit four-channel timers (supporting motor control), one 32-bit four-channel timer and three 16-bit ultra-low-power timers.
These devices also embed two DMA controllers (7 channels each) allowing any transfer combination between memory (Flash memory, SRAM1 and SRAM2) and peripheral, using the DMAMUX1 for flexible DMA channel mapping.
The devices also feature the standard and advanced communication interfaces listed below:
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特徴
- Radio
- Frequency range: 150 MHz to 960 MHz
- Modulation: LoRa®, (G)FSK, (G)MSK and BPSK
- RX sensitivity: –123 dBm for 2-FSK(at 1.2 Kbit/s), –148 dBm for LoRa® (at 10.4 kHz, spreading factor 12)
- Transmitter high output power, programmable up to +22 dBm
- Transmitter low output power, programmable up to +15 dBm
- Compliant with the following radio frequency regulations: ETSI EN 300 220, EN 300 113, EN 301 166, FCC CFR 47 Part 15, 24, 90, 101 and the Japanese ARIB STD-T30, T-67, T-108
- Compatible with standardized or proprietary protocols such as LoRaWAN®, Sigfox™, W-MBus and more (fully open wireless system-on-chip)
- Ultra-low-power platform
- 1.8 V to 3.6 V power supply
- –40 °C to +105 °C temperature range
- Shutdown mode: 31 nA (VDD = 3 V)
- Standby (+ RTC) mode:360 nA (VDD = 3 V)
- Stop2 (+ RTC) mode: 1.07 µA (VDD = 3 V)
- Active-mode MCU: < 72 µA/MHz (CoreMark®)
- Active-mode RX: 4.82 mA
- Active-mode TX: 15 mA at 10 dBm and 87 mA at 20 dBm (LoRa® 125 kHz)
- コア
- 32-bit Arm® Cortex®-M4 CPU
- Adaptive real-time accelerator (ART Accelerator) allowing 0-wait-state execution from Flash memory, frequency up to 48 MHz, MPU and DSP instructions
- 1.25 DMIPS/MHz (Dhrystone 2.1)
- 32-bit Arm® Cortex®-M4 CPU
- Security and identification
- Hardware encryption AES 256-bit
- True random number generator (RNG)
- Sector protection against read/write operations (PCROP, RDP, WRP)
- CRC calculation unit
- Unique device identifier (64-bit UID compliant with IEEE 802-2001 standard)
- 96-bit unique die identifier
- Hardware public key accelerator (PKA)
- Supply and reset management
- High-efficiency embedded SMPS step-down converter
- SMPS to LDO smart switch
- Ultra-safe, low-power BOR (brownout reset) with 5 selectable thresholds
- Ultra-low-power POR/PDR
- Programmable voltage detector (PVD)
- VBAT mode with RTC and 20x32-byte backup registers
- Clock sources
- 32 MHz crystal oscillator
- TCXO support: programmable supply voltage
- 32 kHz oscillator for RTC with calibration
- High-speed internal 16 MHz factory trimmed RC (± 1 %)
- Internal low-power 32 kHz RC
- Internal multi-speed low-power 100 kHz to 48 MHz RC
- PLL for CPU, ADC and audio clocks
- メモリ
- Up to 256-Kbyte Flash memory
- Up to 64-Kbyte RAM
- 20x32-bit backup register
- Bootloader supporting USART and SPI interfaces
- OTA (over-the-air) firmware update capable
- Sector protection against read/write operations
- Rich analog peripherals (down to 1.62 V)
- 12-bit ADC 2.5 Msps, up to 16 bits with hardware oversampling, conversion range up to 3.6 V
- 12-bit DAC, low-power sample-and-hold
- 2x ultra-low-power comparators
- System peripherals
- Semaphores for processor firmware process synchronization
- Controllers
- 2x DMA controller (7 channels each) supporting ADC, DAC, SPI, I2C, LPUART, USART, AES and timers
- 2x USART (ISO 7816, IrDA, SPI)
- 1x LPUART (low-power)
- 2x SPI 16 Mbit/s (1 over 2 supporting I2S)
- 3x I2C (SMBus/PMBus™)
- 2x 16-bit 1-channel timer
- 1x 16-bit 4-channel timer (supporting motor control)
- 1x 32-bit 4-channel timer
- 3x 16-bit ultra-low-power timer
- 1x RTC with 32-bit sub-second wakeup counter
- 1x independent SysTick
- 1x independent watchdog
- 1x window watchdog
- Up to 43 I/Os, most 5 V-tolerant
- Development support
- Serial-wire debug (SWD), JTAG for the application processor
- All packages ECOPACK2 compliant
- Radio
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すべてのリソース
| タイトル | バージョン | 更新日 |
|---|
ハードウェアモデル (1)
| タイトル | バージョン | 更新日 | ||
|---|---|---|---|---|
| 7Z | 1.0 | 27 Jan 2021 | 27 Jan 2021 |
System View Description (2)
| タイトル | バージョン | 更新日 | ||
|---|---|---|---|---|
| ZIP | 1.2 | 01 Jul 2024 | 01 Jul 2024 | |
| ZIP | 1.0 | 18 Jan 2021 | 18 Jan 2021 |
IBIS models (1)
| タイトル | バージョン | 更新日 | ||
|---|---|---|---|---|
| ZIP | 3.0 | 27 Jun 2024 | 27 Jun 2024 |
BSDL files (1)
| タイトル | バージョン | 更新日 | ||
|---|---|---|---|---|
| ZIP | 2.0 | 01 Dec 2020 | 01 Dec 2020 |
Board Manufacturing Specifications (5 of 12)
| タイトル | バージョン | 更新日 | ||
|---|---|---|---|---|
| ZIP | 1.0 | 26 Apr 2022 | 26 Apr 2022 | |
| ZIP | 1.0 | 26 Apr 2022 | 26 Apr 2022 | |
| ZIP | 1.0 | 26 Apr 2022 | 26 Apr 2022 | |
| ZIP | 1.0 | 26 Apr 2022 | 26 Apr 2022 | |
| ZIP | 1.0 | 26 Apr 2022 | 26 Apr 2022 | |
| ZIP | 1.0 | 26 Apr 2022 | 26 Apr 2022 | |
| ZIP | 1.0 | 05 Oct 2023 | 05 Oct 2023 | |
| ZIP | 1.0 | 05 Oct 2023 | 05 Oct 2023 | |
| ZIP | 1.0 | 26 Apr 2022 | 26 Apr 2022 | |
| ZIP | 1.0 | 26 Apr 2022 | 26 Apr 2022 | |
| ZIP | 1.0 | 26 Apr 2022 | 26 Apr 2022 | |
| ZIP | 1.0 | 26 Apr 2022 | 26 Apr 2022 |
BOM (5 of 6)
| タイトル | バージョン | 更新日 | ||
|---|---|---|---|---|
| ZIP | 1.0 | 26 Apr 2022 | 26 Apr 2022 | |
| ZIP | 1.0 | 26 Apr 2022 | 26 Apr 2022 | |
| ZIP | 1.0 | 26 Apr 2022 | 26 Apr 2022 | |
| ZIP | 2.0 | 05 Oct 2023 | 05 Oct 2023 | |
| ZIP | 2.0 | 17 Jun 2022 | 17 Jun 2022 | |
| ZIP | 1.0 | 26 Apr 2022 | 26 Apr 2022 |
Schematic Pack (5 of 6)
| タイトル | バージョン | 更新日 | ||
|---|---|---|---|---|
| ZIP | 1.0 | 26 Apr 2022 | 26 Apr 2022 | |
| ZIP | 1.1 | 28 Feb 2024 | 28 Feb 2024 | |
| ZIP | 1.1 | 28 Feb 2024 | 28 Feb 2024 | |
| ZIP | 1.0 | 05 Oct 2023 | 05 Oct 2023 | |
| ZIP | 1.0 | 26 Apr 2022 | 26 Apr 2022 | |
| ZIP | 1.0 | 26 Apr 2022 | 26 Apr 2022 |
品質 & 信頼性
| 製品型番 | マーケティング･ステータス | パッケージ | グレード | RoHSコンプライアンスグレード | 材料宣誓書** |
|---|---|---|---|---|---|
| STM32WLE4JBI6 | 量産中 | UFBGA 73 5x5x0.6 P 0.5 mm | インダストリアル | Ecopack2 |
(**) st.comで提供している材料宣誓書は、パッケージ･ファミリ内で最も一般的に使用されているパッケージに基づく汎用ドキュメントの場合があります。そのため、特定の製品では100%正確ではない可能性があります。特定の製品情報については、セールスサポートまでお問い合わせください
サンプル & 購入
| 製品型番 | 製品ステータス | Budgetary Price (US$)*/Qty | STから購入 | Order from distributors | パッケージ | 梱包タイプ | RoHS | Country of Origin | ECCN (US) | ECCN (EU) | Operating temperature (°C) | Operating Temperature (°C) (max) | D/A Converters (typ) (12-bit) | Timers (typ) (16-bit) | Timers (typ) (32-bit) | Number of Channels (typ) | SMPS | Number of Channels (typ) | UART (typ) | I/Os (High Current) | Integrated op-amps | Comparator | SPI (typ) | USART (typ) | Number of Channels (typ) | I2S (typ) | Advanced Motor Control Timers | CAN (2.0) | CAN (FD) | ||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 最小 | 最大 | ||||||||||||||||||||||||||||||
| STM32WLE4JBI6 | | | distributors 販売代理店に在庫がない場合は、STのセールス･オフィスまでお問い合わせください |
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STM32WLE4JBI6 量産中
販売代理店に在庫がない場合は、STのセールス･オフィスまでお問い合わせください
（*）概算用の参考価格（US$）です。現地通貨でのお見積りについては、STのセールス･オフィスまたは販売代理店までお問い合わせください。