Overview
Tools & Software
Resources
Solutions
Quality & Reliability
Sales Briefcase
eDesignSuite
Get Started
Sample & Buy
Partner products
  • The ST 65 nm HSSL IP is a radiation hardened high-performance SERDES developed in ST CMOS065LP Low Power 65 nanometer CMOS technology and is provided as Flip chip only layout with build-in 2KV ESD protection. It features 8 channels (4Tx + 4 Rx) and is supplied by 1.2 volt.It embeds a PLL and four identical data slices. Each data slice is composed of a data transmission lane and a data reception lane. The PLL provides very stable 6.25 GHz internal bit clock which is synthesized from a lower frequency input reference clock. This bit clock is used to generate each transmission bit clock and to recover each received bit clock.Each data slice is running independently to each other. In each data slice, the transmitter and receiver are running independently to each other and may have different bit rate.A +/-100ppm plesiochronous operation is guaranteed by design in each data lane individually and independently (Tx data lane and Rx data lane).Each data slice embeds one BIST which contains: a PRBS generator, a BER monitor, an internal data lane loopback TX -> RX (in each data slice) and a TX clock jitter generator.

    Key Features

    • ST CMOS065LP low-power 65 nm CMOS technology
    • 1.5625, 3.125 and 6.25 Gbps operation
    • BER < 10-14
    • 20 bit TX and RX parallel data interface width / sub-rate mode
    • Global power down and per link TX & RX power downs
    • Compact form factor: 3040u x 1600u (tbc)
    • Flip chip only layout
    • Full immunity to single event latch-up (SEL) failures with a LET up to 60MeVcm2/mg
    • No single event functional interrupts (SEFIs), up to 60MeVcm2/mg
    • 1.2V power supply

Sample & Buy

Part Number
General Description
Technology
Agency Qualification
Agency Generic Spec
ECCN (US)
Country of Origin
Order from Distributors
Order from ST
C65SPACE-HSSL 6.25 Gbps multi-rate, multi-lane, SerDes macro IP 65nm - - - - No availability of distributors reported, please contact our sales office

C65SPACE-HSSL

General Description

6.25 Gbps multi-rate, multi-lane, SerDes macro IP

Technology

65nm

Agency Qualification

-

Agency Generic Spec

-

ECCN (US)

-

Country of Origin

-

(*) Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For quotes, prices in local currency, please contact your local ST Sales Office  or our Distributors

Recommended for you

00 Files selected for download

Technical Documentation

    • Description Version Size Action
      DS11072
      6.25 Gbps multi-rate, multi-lane, SerDes macro IP
      2.0
      249.35 KB
      PDF
      DB2591
      6.25 Gbps multi-rate, multi-lane, SerDes macro IP
      1.0
      74.19 KB
      PDF
      DS11072

      6.25 Gbps multi-rate, multi-lane, SerDes macro IP

      DB2591

      6.25 Gbps multi-rate, multi-lane, SerDes macro IP

Publications and Collaterals

    • Description Version Size Action
      List of recent ST technical papers on rad-hard technology
      135.39 KB
      PDF

      List of recent ST technical papers on rad-hard technology

Part Number Marketing Status Package Grade RoHS Compliance Grade Material Declaration**
C65SPACE-HSSL
Active
- Industrial -

C65SPACE-HSSL

Package:

-

Material Declaration**:

Marketing Status

Active

Package

-

Grade

Industrial

RoHS Compliance Grade

-

(**) The Material Declaration forms available on st.com may be generic documents based on the most commonly used package within a package family. For this reason, they may not be 100% accurate for a specific device. Please contact our sales support for information on specific devices.