74VHCT257A

Obsolete
Design Win

Quad 2 Channel Multiplexer (3-state)

Download datasheet

Product overview

Description

The 74VHCT257A is an advanced high-speed CMOS quad 2 channel multiplexer (3-state) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.

It is composed of four independent 2 channel multiplexers with common select and enable input (OE). The VHCT257A is a non-inverting multiplexer.

When the enable input is held “high”, all outputs become high impedance state. If the select input is held “low”, “A” data is selected, when select input is “high”, “B” data is chosen.

Power-down protection is provided on all inputs and outputs and 0 to 7 V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5 V to 3 V since all inputs are equipped with TTL threshold.

All inputs and outputs are equipped with protection circuits against static discharge, giving them 2 KV ESD immunity and transient excess voltage.

  • All features

    • High speed: tPD= 4.8 ns (typ.) at VCC= 5 V
    • Low power dissipation ICC= 4 μA (max.) at TA = 25 °C
    • Compatible with TTL outputs VIH= 2 V (min.), VIL= 0.8 V (max.)
    • Power-down protection on inputs and outputs
    • Symmetrical output impedance |IOH| = IOL= 8 mA (min.)
    • Balanced propagation delays: tPLH≅ tPHL
    • Operating voltage range: VCC(opr)= 4.5 to 5.5 V
    • Pin and function compatible with 74 series 257
    • Improved latch-up immunity
    • Low noise: VOLP= 0.8 V (max.)

EDA Symbols, Footprints and 3D Models

The STMicroelectronics team - 74VHCT257A

Speed up your design by downloading all the EDA symbols, footprints and 3D models for your application. You have access to a large number of CAD formats to fit with your design toolchain.

Please select one model supplier :

Symbols

Symbols

Footprints

Footprints

3D model

3D models