The Wireless M-Bus – or Wireless Meter Bus – is an open standard developed for very power-efficient smart metering and Advanced Metering Infrastructure (AMI) applications and it is quickly spreading in Europe for automatic electricity, gas, water and heat meter reading applications.
A Wireless M-Bus network (wM-Bus) is based on a star topology network with primary and replica devices described in the EN 13757 standard which comprises a number of different operating modes: S, T, R and C (868 MHz), F (433 MHz) and N (169 MHz).
ST offers a range of sub-1GHz transceivers, baluns and STM32 microcontrollers together with a large set of software libraries, including a free wM-Bus firmware stack for evaluation and sample implementation of a wM-Bus gateway in addition to hardware tools that enable quick development and deployment of wM-Bus networks.
- STM32WLE5JB Sub-GHz Wireless Microcontrollers. Arm Cortex-M4 @48 MHz with 128 Kbytes of Flash memory, 48 Kbytes of SRAM. LoRa, (G)FSK, (G)MSK, BPSK modulations. AES 256-bit. Multiprotocol System-on-Chip.
- STM32WLE5CC Sub-GHz Wireless Microcontrollers. Arm Cortex-M4 @48 MHz with 256 Kbytes of Flash memory, 64 Kbytes of SRAM. LoRa, (G)FSK, (G)MSK, BPSK modulations. AES 256-bit. Multiprotocol System-on-Chip.
- STM32WLE5JC Sub-GHz Wireless Microcontrollers. Arm Cortex-M4 @48 MHz with 256 Kbytes of Flash memory, 64 Kbytes of SRAM. LoRa, (G)FSK, (G)MSK, BPSK modulations. AES 256-bit. Multiprotocol System-on-Chip.
- STM32WL54JC Sub-GHz Wireless Microcontrollers. Dual-core Arm Cortex-M4/M0+ @48 MHz with 256 Kbytes of Flash memory, 64 Kbytes of SRAM. (G)FSK, (G)MSK, BPSK modulations. AES 256-bit. Multiprotocol System-on-Chip.
- STM32WL55JC Sub-GHz Wireless Microcontrollers. Dual-core Arm Cortex-M4/M0+ @48 MHz with 256 Kbytes of Flash memory, 64 Kbytes of SRAM. LoRa, (G)FSK, (G)MSK, BPSK modulations. AES 256-bit. Multiprotocol System-on-Chip.
- STM32WL55CC Sub-GHz Wireless Microcontrollers. Dual-core Arm Cortex-M4/M0+ @48 MHz with 256 Kbytes of Flash memory, 64 Kbytes of SRAM. LoRa, (G)FSK, (G)MSK, BPSK modulations. AES 256-bit. Multiprotocol System-on-Chip.
- STM32WLE5J8 Sub-GHz Wireless Microcontrollers. Arm Cortex-M4 @48 MHz with 64 Kbytes of Flash memory, 20 Kbytes of SRAM. LoRa, (G)FSK, (G)MSK, BPSK modulations. AES 256-bit. Multiprotocol System-on-Chip.
- S2-LP Ultra-low power, high performance, sub-1GHz transceiver
- STM32WLE4CC Sub-GHz Wireless Microcontrollers. Arm Cortex-M4 @48 MHz with 256 Kbytes of Flash memory, 64 Kbytes of SRAM. (G)FSK, (G)MSK, BPSK modulations. AES 256-bit. Multiprotocol System-on-Chip.
- STM32WLE4JC Sub-GHz Wireless Microcontrollers. Arm Cortex-M4 @48 MHz with 256 Kbytes of Flash memory, 64 Kbytes of SRAM. (G)FSK, (G)MSK, BPSK modulations. AES 256-bit. Multiprotocol System-on-Chip.
- STM32WLE5CB Sub-GHz Wireless Microcontrollers. Arm Cortex-M4 @48 MHz with 128 Kbytes of Flash memory, 48 Kbytes of SRAM. LoRa, (G)FSK, (G)MSK, BPSK modulations. AES 256-bit. Multiprotocol System-on-Chip.
- STM32WLE5C8 Sub-GHz Wireless Microcontrollers. Arm Cortex-M4 @48 MHz with 64 Kbytes of Flash memory, 20 Kbytes of SRAM. LoRa, (G)FSK, (G)MSK, BPSK modulations. AES 256-bit. Multiprotocol System-on-Chip.
- STM32WL54CC Sub-GHz Wireless Microcontrollers. Dual-core Arm Cortex-M4/M0+ @48 MHz with 256 Kbytes of Flash memory, 64 Kbytes of SRAM. (G)FSK, (G)MSK, BPSK modulations. AES 256-bit. Multiprotocol System-on-Chip.
