The STM32F769/779 lines offer the performance of the Cortex-M7 core (with double precision floating point unit) running up to 216 MHz while reaching similar lower static power consumption (Stop mode) versus the STM32F427/429/437/439 lines.

  • Performance: At 216 MHz fCPU, the STM32F769/779 lines deliver 1082 CoreMark /462 DMIPS performance executing from Flash memory, with 0-wait states thanks to ST’s ART Accelerator. The DSP instructions and the floating point unit enlarge the range of addressable applications. External memory can be used with no performance penalty thanks to the L1 cache (I/D 16 Kbytes + 16 Kbytes).

  • Power efficiency: ST’s 90 nm process, ART Accelerator and dynamic power scaling enables the power consumption in Run mode and executing from Flash memory to be at 7 CoreMark / mW at 1.8 V. In Stop mode, power consumption is typically 100 µA, which is similar to the STM32F427/429/437/439 lines.

  • Graphics: The new LCD-TFT controller interface with dual-layer support takes advantage of the Chrom‑ART Accelerator™. This graphics accelerator creates content twice as fast as the core alone. As well as efficient 2-D raw data copy, additional functions are supported by the Chrom-ART Accelerator such as image format conversion or image blending (image mixing with some transparency). As a result, the Chrom-ART Accelerator boosts graphics content creation and saves the processing bandwidth of the MCU core for the rest of the application. The STM32F769/779 lines embed a JPEG hardware accelerator for fast JPEG encoding and decoding off-loading the CPU which remains available for other tasks. The STM32F769/779 lines also embed a MIPI-DSI interface allowing the drive of DSI display technology which are commonly found in the mobile market.

  • Integration:
    • Audio: Two dedicated audio PLLs, three half-duplex I²S interfaces, a new serial audio interface (SAI) supporting time-division multiplex (TDM) mode and a DFSDM (Digital filters for sigma-delta modulators or Mems Microphone)
    • Up to 28 communication interfaces including four USARTs in addition to four UARTs running at up to 12.5 Mbit/s, six SPIs running at up to 50 Mbit/s, four I²C interfaces with a new optional digital filter capability, three CAN, two SDIO, USB 2.0 full-speed device/host/OTG controller with an on-chip PHY and a USB 2.0 high-speed/full-speed device/host/OTG controller, on-chip full-speed PHY and ULPI, Ethernet MAC, SPDIF-IN, HDMI-CEC, MDIO slave.
    • Analog: Two 12-bit DACs, three 12-bit ADCs reaching 2.4 MSPS or 7.2 MSPS in Interleaved mode. Up to 18 timers: 16- and 32-bit running at up to 216 MHz.
      Easily extendable memory range using the flexible memory controller with 32-bit parallel interface, and supporting Compact Flash, SRAM, PSRAM, NOR, NAND and SDRAM memories or using the Dual-mode Quad-SPI to allow code execution from external serial Flash memory.
      An analog true random number generator.

The STM32F779 line integrates a crypto/hash processor providing hardware acceleration for AES-128, -192 and -256 encryption, with support for GCM and CCM, Triple DES, and hash (MD5, SHA-1 and SHA-2) algorithms.

The STM32F769 and STM32F779 portfolio provides from 1Mbyte to 2 Mbyte of Flash memory, 512-Kbyte SRAM including up to 128 Kbytes of Tightly-Coupled Memory for Data (DTCM), 16-Kbyte ITCM RAM, 4-Kbyte Backup RAM and 100- to 216-pin packages including a WLCSP* form factor as small as 5.6 x 6.1 mm.

Note: * while the “regulator off” feature is available in the STM32F7x9  LQFP and BGA package variants upon activation via a dedicated input, the feature is not available on standard WLCSP product variants. However, two specific  WLCSP “regulator off” devices are available, STM32F778 (with crypto/hash accelerator) and STM32F768 (without crypto/hash accelerator), operating at 180 MHz maximum CPU frequency.