Product overview
Key Benefits
Mainlined OpenSTLinux Distribution
One OpenSTLinux Software compatible with STM32MPU Family. OpenSTLinux expansion packages can be applied on the top to enable the use of additional components.
DDR3L support for market advantage
On top of the DDR4/LPDDR4, the STM32MP2 Series supports DDR3L memory, enabling you to maintain competitive pricing and secure supply amid DDR4/LPDDR4 shortages and price surges observed since middle of 2025.
Description
STM32MP21xA/D devices are based on the high-performance core Arm® Cortex®-A35 64-bit RISC core operating at up to 1.5 GHz. The Cortex®‑A35 processor includes a 32-Kbyte L1 instruction cache, a 32-Kbyte L1 data cache, and a 128-Kbyte L2 cache. The Cortex®‑A35 processor uses a highly efficient 8-stage in-order pipeline that has been extensively optimized to provide full Armv8-A features while maximizing area and power efficiency.
STM32MP21xA/D devices also embed a Cortex®-M33 32-bit RISC core operating at up to 300 MHz frequency. The Cortex®-M33 core features a floating-point unit (FPU) single precision which supports Arm® single-precision data-processing instructions, and data types. The Cortex®-M33 supports a full set of DSP instructions, TrustZone®, and a memory protection unit (MPU) which enhances application security.
STM32MP21xA/D devices provide an external SDRAM interface supporting external memories up to 4 Gbytes, 16‑bit DDR3L up to 800 MHz, 16‑bit LPDDR4, or DDR4 up to 800 MHz.
The devices incorporate high-speed embedded memories: 456 Kbytes of internal SRAM (including 256-Kbyte AXI SYSRAM), one bank of 64 Kbytes of AHB SRAM, 128 Kbytes of AHB SRAM in backup domain, and 8 Kbytes of SRAM in backup domain), as well as an extensive range of enhanced I/Os and peripherals connected to APB buses, AHB buses, a 32-bit multi-AHB bus matrix, and a 128/64-bit multilayer AXI interconnect supporting access to internal and external memories.
Each device offers two ADCs, a low-power secure RTC, 12 general-purpose 16-bit timers, four general-purpose 32‑bit timers, two PWM timers for motor control, five low-power timers, two true random number generator (RNG).
The devices support four multifunction digital filters (MDF)
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All features
- Includes ST state-of-the-art patented technology.
- Cores
- 64-bit single-core Arm® Cortex®-A35
- Up to 1.5 GHz
- 32-Kbyte I + 32-Kbyte D level 1 cache for each core
- 128-Kbyte level 2 cache
- Arm® NEON™ and Arm® TrustZone®
- 32-bit Arm® Cortex®-M33 with FPU/MPU
- Up to 300 MHz
- L1 16-Kbyte I / 16-Kbyte D
- Arm® TrustZone®
- 64-bit single-core Arm® Cortex®-A35
- Memories
- External DDR memory up to 4 Gbytes
- DDR3L-1600 16-bit
- DDR4-1600 16-bit
- LPDDR4-1600 16-bit
- 456-Kbyte internal SRAM: 256-Kbyte AXI SYSRAM, 64-Kbyte AHB SRAM, 128-Kbyte AHB SRAM with ECC in backup domain, 8-Kbyte SRAM with ECC in backup domain
- One Octo-SPI memory interfaces
- Flexible external memory controller with up to 16-bit data bus: parallel interface to connect external ICs, and SLC NAND memories with up to 8-bit ECC
- External DDR memory up to 4 Gbytes
- Security/safety
- TrustZone® peripherals, active tamper, environmental monitors, display secure layer, hardware accelerators
- Complete resource isolation framework
- Reset and power management
- 1.71 to 1.95 V and 2.7/3.0 to 3.6 V multiple section I/O supply
- POR, PDR, PVD, and BOR
- On-chip LDO and power-switches for RETRAM, BKPSRAM, and VSW
- Dedicated supplies for Cortex®-A35
- Internal temperature sensor
- Low-power modes: Sleep, Stop, and Standby
- DDR memory retention in Standby mode
- Controls for PMIC companion chip
- Low-power consumption
- Clock management
- Internal oscillators: 64 MHz HSI, 16 MHz MSI, 32 kHz LSI
- External oscillators: 16-48 MHz HSE, 32.768 kHz LSE
- Up to 7× PLLs with fractional mode
- General-purpose inputs/outputs
- Up to 123 secure I/O ports with interrupt capability
- Up to six wake-up inputs
- Up to seven tamper input pins + 5 active tampers output pins
- Up to 123 secure I/O ports with interrupt capability
- Interconnect matrix
- Bus matrices
- 128-, 64-, 32-bit STNoC interconnect, up to 600 MHz
- 32-bit Arm® AMBA® AHB interconnect, up to 300 MHz
- Bus matrices
- 3 DMA controllers to unload the CPU
- 48 physical channels in total
- 3× dual master port, high-performance, general-purpose, direct memory access controller (HPDMA), 16 channels each
- Up to 37 communication peripherals
- 3× I2C FM+ (1 Mbit/s, SMBus/PMBus®)
- 3× I3C (12.5 Mbit/s)
- 3× UART + 4× USART (12.5 Mbit/s, ISO7816 interface, LIN, IrDA, SPI) + 1× LPUART
- 6× SPI (50 Mbit/s, including 3 with full duplex I2S audio class accuracy via internal audio PLL or external clock)(+1 with OCTOSPI + 4 with USART)
- 4× SAI (stereo audio: I2S, PDM, SPDIF Tx)
- SPDIF Rx with four inputs
- 3× SDMMC up to 8-bit (SD/e•MMC™/SDIO)
- Up to 2× CAN controllers supporting CAN FD protocol, out of which one supports time-triggered CAN (TTCAN)
- 1× USB 2.0 high-speed Host with embedded 480 Mbits/s PHY
- 1× USB 2.0 high-speed dual role data with embedded 480 Mbits/s PHY
- Up to 2× Gigabit Ethernet interfaces
- TSN, IEEE 1588v2 hardware, MII/RMII/RGMII
- Camera interface #1 (5 Mpixels at 30 fps)
- MIPI CSI-2®, 2× data lanes up to 2.5 Gbit/s each
- 8- to 16-bit parallel, up to 120 MHz
- RGB, YUV, JPG, RawBayer with light ISP
- Lite-ISP, demosaicing, downscaling, cropping, 3 pixel pipelines
- Camera interface #2 (1 Mpixels at 15 fps)
- 8- to 14-bit parallel, up to 80 MHz
- RGB, YUV, JPG
- Cropping
- Digital parallel interface up to 16-bit input or output
- 5 analog peripherals
- 2 × ADCs with 12-bit max. resolution (up to 5 Msps each, up to 23 channels)
- Internal temperature sensor (DTS)
- 1× multifunction digital filter (MDF) with up to 4 channels/4 filters
- Internal (VREFBUF) or external ADC reference VREF+
- Graphics
- LCD-TFT controller, up to 24-bit // RGB888
- Up to FHD (1920 × 1080) at 60 fps
- 3 layers including a secure layer
- YUV support
- LCD-TFT controller, up to 24-bit // RGB888
- Up to 28 timers and 5 watchdogs
- 4× 32-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
- 2× 16-bit advanced motor control timers
- 10× 16-bit general-purpose timers (including 2 basic timers without PWM)
- 5× 16-bit low-power timers
- Secure RTC with subsecond accuracy and hardware calendar
- 4 Cortex®-A35 system timers (secure, nonsecure, virtual, hypervisor)
- 2× SysTick Cortex®-M33 timer (secure, nonsecure)
- 5× watchdogs (4× independent and 1× window)
- Hardware acceleration
- ECDSA verification with SCA
- 2x HASH (SHA-1, SHA-224, SHA-256, SHA3), HMAC
- 2x true random number generator
- CRC calculation unit
- Debug mode
- Arm® CoreSight™ trace and debug: SWD and JTAG interfaces
- 12288-bit fuses including 96-bit unique ID
- All packages are ECOPACK2 compliant
Circuit Diagram
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EDA Symbols, Footprints and 3D Models
The STMicroelectronics team - STM32MP215A
Speed up your design by downloading all the EDA symbols, footprints and 3D models for your application. You have access to a large number of CAD formats to fit with your design toolchain.
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All resources
| Resource title | Version | Latest update |
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HW Models (1)
| Resource title | Version | Latest update | |||
|---|---|---|---|---|---|
| ZIP | 6.0 | 05 May 2025 | 05 May 2025 |
System View Description (1)
| Resource title | Version | Latest update | |||
|---|---|---|---|---|---|
| ZIP | 1.2 | 05 May 2025 | 05 May 2025 |
IBIS models (1)
| Resource title | Version | Latest update | |||
|---|---|---|---|---|---|
| ZIP | 3.3 | 15 Oct 2025 | 15 Oct 2025 |
BSDL files (1)
| Resource title | Version | Latest update | |||
|---|---|---|---|---|---|
| ZIP | 3.0 | 15 Oct 2025 | 15 Oct 2025 |
Quality and Reliability
| Part Number | Marketing Status | Package | Grade | RoHS Compliance Grade | Longevity Commitment | Longevity Starting Date | Material Declaration** |
|---|---|---|---|---|---|---|---|
| STM32MP215AAL3 | Active | VFBGA 361 10x10X1.0 P 0.5 mm | Industrial | Ecopack2 | - | - | |
| STM32MP215AAM3 | Active | TFBGA 289 14x14x1.2 P 0.8 mm | Industrial | Ecopack2 | - | - | |
| STM32MP215AAN3 | Active | VFBGA 273 11x11x1.0 P 0.5 mm | Industrial | Ecopack2 | - | - | |
| STM32MP215AAO3 | Active | VFBGA 225 8x8x1.0 P 0.5 mm | Industrial | Ecopack2 | - | - | |
STM32MP215AAL3
Package:
VFBGA 361 10x10X1.0 P 0.5 mmMaterial Declaration**:
STM32MP215AAM3
Package:
TFBGA 289 14x14x1.2 P 0.8 mmMaterial Declaration**:
STM32MP215AAN3
Package:
VFBGA 273 11x11x1.0 P 0.5 mmMaterial Declaration**:
STM32MP215AAO3
Package:
VFBGA 225 8x8x1.0 P 0.5 mmMaterial Declaration**:
(**) The Material Declaration forms available on st.com may be generic documents based on the most commonly used package within a package family. For this reason, they may not be 100% accurate for a specific device. Please contact our sales support for information on specific devices.
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Sample & Buy
| Part Number | Marketing Status | Budgetary Price (US$)*/Qty | Order from ST | Order from distributors | Package | Packing Type | RoHS | Country of Origin | ECCN (US) | ECCN (EU) | Operating Temperature (°C) (min) | Operating Temperature (°C) (max) | Junction Temperature (°C) (min) | Junction Temperature (°C) (max) | |
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| STM32MP215AAL3 | | | distributors No availability of distributors reported, please contact our sales office |
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| STM32MP215AAN3 | | | distributors No availability of distributors reported, please contact our sales office |
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| STM32MP215AAM3 | | | distributors No availability of distributors reported, please contact our sales office |
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| STM32MP215AAO3 | | | distributors No availability of distributors reported, please contact our sales office |
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STM32MP215AAL3 Active
STM32MP215AAN3 Active
STM32MP215AAM3 Active
STM32MP215AAO3 Active
(*) Suggested Resale Price (USD) per defined quantity for BUDGETARY USE ONLY. For quotes, prices in local currency, please contact your local ST Sales Office or our Distributors