STM32H7 Series

The STM32H7 series now includes dual-core microcontrollers with Arm® Cortex®-M7 and Cortex®-M4 cores able to run up to 480 MHz and 240 MHz respectively. Our single-core Cortex®-M7 STM32H7 series also benefits from this frequency increase and can now run up to 480 MHz as well. Dual-core STM32H7 microcontrollers are available with an embedded SMPS for improved dynamic power efficiency.

Extended temperature range support up to 125 °C (ambient) will be available for certain devices for use in harsh environments including industrial applications.

STM32H7 devices embedding a crypto/hash processor support security services such as Secure Firmware Install and Secure Boot – Secure Firmware Upgrade allowing the installation of new application code in a secured manner.

All the other features that have made single-core STM32H7 MCUs a success are still available in the dual-core versions. The STM32H7 series remains more than ever the microcontroller with an embedded Flash memory offering the highest performance on the market. 

Dual-core STM32H7 series of high-performance MCUs with Arm® Cortex®-M7 and M4 cores

Taking advantage of an L1 cache, STM32H7 devices deliver the maximum theoretical performance of the Cortex-M7 and Cortex-M4 cores, regardless if code is executed from embedded Flash or external memory: 3224 CoreMark /1327 DMIPS at 480 MHz f_CPU.

Smart architecture with new-generation peripherals

The STM32H7 series unleashes the Cortex-M7 core:

• AXI and multi-AHB bus matrixes for interconnecting core, peripherals and memories
• 16 Kbytes +16 Kbytes of I-cache and D-cache
• Up to 2 Mbytes of embedded dual-bank Flash memory, with ECC and Read-While-Write capability

• A high-speed master direct memory access (MDMA) controller, two dual-port DMAs with FIFO and request router capabilities for optimal peripheral management, and one additional DMA
• Chrom-ART Accelerator™ for efficient 2D image copy and double-precision FPU are also part of the acceleration features available. A MIPI-DSI physical layer to drive high-resolution displays is also available on certain devices.
• Thanks to dual-clock support, the speed of peripherals is independent from the CPU’s speed, allowing system clock changes without any impact on peripheral operations
• Even more peripherals, such as four serial audio interfaces (SAI) with SPDIF output support, three full-duplex I²S interfaces, a SPDIF input interface supporting four inputs, two USB OTG with dedicated power supply and Dual-mode Quad-SPI interface, two FD-CAN controllers, a high-resolution timer, a TFT-LCD controller, a JPEG codec, two SDIO interfaces and many other analog peripherals including three fast 16-bit ADCs, two comparators and two operational amplifiers.
• 1 Mbyte of SRAM (**) with a scattered architecture:1 Mbyte of SRAM with a scattered architecture:
  • 192 Kbytes of TCM RAM (including 64 Kbytes of ITCM RAM and 128 Kbytes of DTCM RAM for time-critical routines and data), 512 Kbytes, 288 Kbytes and 64 Kbytes of user SRAM, and 4 Kbytes of SRAM in backup domain to keep data in the lowest power modes

(**): 692 Kbytes on STM32H742 devices

Security

Authenticate and protect your software IP while performing initial programming in production or firmware upgrades in the field). The Secure Firmware Install and Secure Boot – Secure Firmware Upgrade (available in Q3’2019) allow the user to perform the initial programming of the device in a secured manner, or to perform a secured field upgrade of the code. These services are only available with STM32H757 devices embedding a crypto/hash processor: STM32H755, STM32H757 and STM32H750.

Power efficiency

The multi-power domains architecture allows the different power domains to be set in low-power mode to optimize the power efficiency. In addition to the main regulator featuring voltage scaling to supply the core in different voltage ranges during Run and Stop modes, the device also embeds a USB regulator to supply the embedded physical layer (PHY) and a backup regulator.

The dual-core STM32H747/H757 and STM32H745/H755 microcontrollers come with an on-chip SMPS, significantly improving dynamic power efficiency. The SMPS can also be used to generate power for external components if needed.

• 145 µ/MHz typical @VDD = 3.3 V and 25 °C in Run mode (peripherals off) and SMPS
• 2.80 µA typical in Standby mode (low-power mode)

Compatibility

The Cortex-M7 core is backwards compatible with the Cortex-M4 instruction set.

The STM32H743/STM32H742/STM32H753/STM32H750 line is pin-to-pin compatible with the STM32F7 series of very high-performance MCUs and STM32F4 series of high-performance MCUs for the most for common packages.(***)

(***): see datasheet for the specific case of 100-pin packages